The present invention is related to a capacitor exhibiting high capacitance per unit volume. More specifically, the present invention is related to an improved conductive inner electrode design which improves electrode overlap, and therefore capacitance, with high voltage rating and no arc-over.
Traditional high voltage capacitor designs, such as for use at ≧500Vdc, typically combine 2 or more capacitors in series within the same multilayer ceramic device package. These serial designs are effective at increasing effective voltage since the effective voltage is divided between the 2 capacitors. Capacitors arranged in series are also effective in decreasing the occurrence of surface-arc-over. Unfortunately, the effective capacitance, Ceff, of a serial device is significantly lowered since 1/Ceff=Σ1/Cn where n is the number of capacitors in series.
The practitioner has therefore had to balance the desire for high voltage capability, which can be improved by serial capacitors, with the desire for high capacitance, which is compromised with serial capacitors.
For voltages up to about 2,500 Vdc the capacitance can be increased with minimal flash over by coating the capacitors themselves, or the board or assembled device, using standard MLCC designs. In the case of the individual monolithic multilayer capacitors the leads are attached and the part epoxy coated. A significant disadvantage to this approach is that the leaded part cannot typically be used in an automated surface mount assembly process and there is some additional cost associated with the leads and epoxy.
One approach to mitigate the problem associated with flashover is described in U.S. Pat. No. 6,134,098 wherein lower K dielectric layers are used on the top and bottom of a series capacitor design. Although this approach is effective to decrease flash over this is still a serial capacitor design and the effective capacitance is lower as detailed above. Furthermore, differences in the thermal expansion coefficient of the various materials are problematic since thermal stresses are created during tiring.
Japanese Patent Abstract 2006-066831 by SHIMIZU MICHINAO, ITO KAZUNORI and KOMATSU TOSHIAKI discloses a multilayer ceramic capacitor design which raises the starting voltage of the surface discharge. To achieve this effect a serial type arrangement of capacitors, using multiple internal electrode prints, is required.
Coating of parts whilst retaining the ability to surface mount can retard arc over. U.S. Pat. No. 6,627,529, by Duva and related U.S. Pat. No. 6,683,782, both of which are incorporated herein by reference, describe the benefits, and method, for applying para-xylylene polymer coatings to multi-layer ceramic capacitors. Coating individual parts, or the final assemblies, is cost prohibitive so these approaches have been restricted to high value added applications in electronics.
Capacitance, C, is defined by the following equation; C=∈r∈0An/t; where ∈r is the relative permittivity of the dielectric; ∈0 is a constant equal to the permittivity of free space; A is the overlap area for each internal conductive layer, also referred to as an active; n is the number of actives and t is the separation distance or thickness between the electrodes. Therefore, it is an ongoing desire to increase the number of layers and overlap area while decreasing the layer separation. Often the efforts to increase voltage are contrary to one, or more of these desires.
For example, in a more recent approach presented in U.S. Pat. No. 7,336,475 by Bultitude et al, which is incorporated herein by reference, shield electrodes are used which allow for a high voltage capability by prohibiting surface-arc-over whilst retaining a relatively high overlap area for high capacitance in a non-serial design. This design combines a top and bottom shield electrode that protects the oppositely charged electrode below from arc-over from the terminal in contact with the shield. Side shields are also described which function in a similar manner by protecting each active electrode along the side of the part by connecting to the terminal of opposite polarity while overlapping the active electrode to prevent arc over.
US Pat. Publ. No. 2009/0052111 also to Bultitude, the entirety of which is incorporated by reference, describes the use of a coating of polyimide applied by spin coating to further increase voltage breakdown. Related US Pat. Publ. No. 2009/0052112, the entirety of which is incorporated by reference, describes the need to shield between the terminal and the opposed electrode. In both cases the MLCC designs described use side shields connected to the opposed terminal.
The presence of side shields connected to the opposite terminal in each of the active layers confers a risk of a breakdown pathway between the shields and the active electrode. This pathway may occur due to contamination or electrode “bleed out” during the electrode printing process that would result in a short circuit and catastrophic failure of the capacitor. Furthermore, although the prior art designs have more overlap, and therefore higher capacitance, than the serial designs the side shields take-up a significant area which does not contribute to capacitance. The area occupied by the side shields decreases the available capacitance as a function of total volume since the area occupied by the shields can not be utilized for electrode overlap.
In spite of the advances in the art there is still a long standing desire for a capacitor with improved capacitance, for use in high voltage applications, which has minimal flashover. Such a capacitor is provided herein.